X-Git-Url: https://wimlib.net/git/?a=blobdiff_plain;f=src%2Flzms_common.c;h=fb13a4358c5469a79d0c4c5e101c03ee2f9e59db;hb=2f41998788d213038036a1cc863affa3818ba4d3;hp=9d9d7b2ae88bb5d4c116dd82981349c5a51f5733;hpb=723d5dbc1705200082f640453f19233a386bc655;p=wimlib

diff --git a/src/lzms_common.c b/src/lzms_common.c
index 9d9d7b2a..fb13a435 100644
--- a/src/lzms_common.c
+++ b/src/lzms_common.c
@@ -3,7 +3,7 @@
  */
 
 /*
- * Copyright (C) 2013, 2014 Eric Biggers
+ * Copyright (C) 2013-2016 Eric Biggers
  *
  * This file is free software; you can redistribute it and/or modify it under
  * the terms of the GNU Lesser General Public License as published by the Free
@@ -379,7 +379,7 @@ lzms_dilute_symbol_frequencies(u32 freqs[], unsigned num_syms)
 
 
 #ifdef __x86_64__
-static inline u8 *
+static forceinline u8 *
 find_next_opcode_sse4_2(u8 *p)
 {
 	const __v16qi potential_opcodes = (__v16qi) {0x48, 0x4C, 0xE8, 0xE9, 0xF0, 0xFF};
@@ -391,7 +391,11 @@ find_next_opcode_sse4_2(u8 *p)
 		"  pcmpestri $0x0, (%[p]), %[potential_opcodes]      \n"
 		"  jnc 1b                                            \n"
 		"2:                                                  \n"
+	#ifdef __ILP32__ /* x32 ABI (x86_64 with 32-bit pointers) */
+		"  add %%ecx, %[p]                                   \n"
+	#else
 		"  add %%rcx, %[p]                                   \n"
+	#endif
 		: [p] "+r" (p)
 		: [potential_opcodes] "x" (potential_opcodes), "a" (6), "d" (16)
 		: "rcx", "cc"
@@ -401,7 +405,7 @@ find_next_opcode_sse4_2(u8 *p)
 }
 #endif /* __x86_64__ */
 
-static inline u8 *
+static forceinline u8 *
 find_next_opcode_default(u8 *p)
 {
 	/*
@@ -433,7 +437,7 @@ find_next_opcode_default(u8 *p)
 	return p;
 }
 
-static inline u8 *
+static forceinline u8 *
 translate_if_needed(u8 *data, u8 *p, s32 *last_x86_pos,
 		    s32 last_target_usages[], bool undo)
 {
@@ -444,62 +448,69 @@ translate_if_needed(u8 *data, u8 *p, s32 *last_x86_pos,
 
 	max_trans_offset = LZMS_X86_MAX_TRANSLATION_OFFSET;
 
-	if ((*p & 0xFE) == 0xE8) {
-		if (*p & 0x01) {
-			/* 0xE9: Jump relative  */
-			p += 4;
-		} else {
-			/* 0xE8: Call relative.  Note: 'max_trans_offset' must
-			 * be halved for this instruction.  This means that we
-			 * must be more confident that we are in a region of x86
-			 * machine code before we will do a translation for this
-			 * particular instruction.  */
-			opcode_nbytes = 1;
-			max_trans_offset /= 2;
-			goto have_opcode;
-		}
-	} else if ((*p & 0xFB) == 0x48) {
-		if (*p & 0x04) {
-			/* 0x4C */
-			if (*(p + 1) == 0x8D) {
-				if ((*(p + 2) & 0x7) == 0x5) {
-					/* Load effective address relative (x86_64)  */
-					opcode_nbytes = 3;
-					goto have_opcode;
-				}
-			}
-		} else {
-			/* 0x48 */
-			if (*(p + 1) == 0x8B) {
-				if (*(p + 2) == 0x5 || *(p + 2) == 0xD) {
-					/* Load relative (x86_64)  */
-					opcode_nbytes = 3;
-					goto have_opcode;
-				}
-			} else if (*(p + 1) == 0x8D) {
-				if ((*(p + 2) & 0x7) == 0x5) {
-					/* Load effective address relative (x86_64)  */
-					opcode_nbytes = 3;
-					goto have_opcode;
-				}
-			}
-		}
-	} else {
-		if (*p & 0x0F) {
-			/* 0xFF */
-			if (*(p + 1) == 0x15) {
-				/* Call indirect  */
+	/*
+	 * p[0] has one of the following values:
+	 *	0x48 0x4C 0xE8 0xE9 0xF0 0xFF
+	 */
+
+	if (p[0] >= 0xF0) {
+		if (p[0] & 0x0F) {
+			/* 0xFF (instruction group)  */
+			if (p[1] == 0x15) {
+				/* Call indirect relative  */
 				opcode_nbytes = 2;
 				goto have_opcode;
 			}
 		} else {
-			/* 0xF0 */
-			if (*(p + 1) == 0x83 && *(p + 2) == 0x05) {
+			/* 0xF0 (lock prefix)  */
+			if (p[1] == 0x83 && p[2] == 0x05) {
 				/* Lock add relative  */
 				opcode_nbytes = 3;
 				goto have_opcode;
 			}
 		}
+	} else if (p[0] <= 0x4C) {
+
+		/* 0x48 or 0x4C.  In 64-bit code this is a REX prefix byte with
+		 * W=1, R=[01], X=0, and B=0, and it will be followed by the
+		 * actual opcode, then additional bytes depending on the opcode.
+		 * We are most interested in several common instructions that
+		 * access data relative to the instruction pointer.  These use a
+		 * 1-byte opcode, followed by a ModR/M byte, followed by a
+		 * 4-byte displacement.  */
+
+		/* Test: does the ModR/M byte indicate RIP-relative addressing?
+		 * Note: there seems to be a mistake in the format here; the
+		 * mask really should be 0xC7 instead of 0x07 so that both the
+		 * MOD and R/M fields of ModR/M are tested, not just R/M.  */
+		if ((p[2] & 0x07) == 0x05) {
+			/* Check for the LEA (load effective address) or MOV
+			 * (move) opcodes.  For MOV there are additional
+			 * restrictions, although it seems they are only helpful
+			 * due to the overly lax ModR/M test.  */
+			if (p[1] == 0x8D ||
+			    (p[1] == 0x8B && !(p[0] & 0x04) && !(p[2] & 0xF0)))
+			{
+				opcode_nbytes = 3;
+				goto have_opcode;
+			}
+		}
+	} else {
+		if (p[0] & 0x01) {
+			/* 0xE9: Jump relative.  Theoretically this would be
+			 * useful to translate, but in fact it's explicitly
+			 * excluded.  Most likely it creates too many false
+			 * positives for the detection algorithm.  */
+			p += 4;
+		} else {
+			/* 0xE8: Call relative.  This is a common case, so it
+			 * uses a reduced max_trans_offset.  In other words, we
+			 * have to be more confident that the data actually is
+			 * x86 machine code before we'll do the translation.  */
+			opcode_nbytes = 1;
+			max_trans_offset >>= 1;
+			goto have_opcode;
+		}
 	}
 
 	return p + 1;
@@ -509,15 +520,15 @@ have_opcode:
 	p += opcode_nbytes;
 	if (undo) {
 		if (i - *last_x86_pos <= max_trans_offset) {
-			u32 n = get_unaligned_u32_le(p);
-			put_unaligned_u32_le(n - i, p);
+			u32 n = get_unaligned_le32(p);
+			put_unaligned_le32(n - i, p);
 		}
-		target16 = i + get_unaligned_u16_le(p);
+		target16 = i + get_unaligned_le16(p);
 	} else {
-		target16 = i + get_unaligned_u16_le(p);
+		target16 = i + get_unaligned_le16(p);
 		if (i - *last_x86_pos <= max_trans_offset) {
-			u32 n = get_unaligned_u32_le(p);
-			put_unaligned_u32_le(n + i, p);
+			u32 n = get_unaligned_le32(p);
+			put_unaligned_le32(n + i, p);
 		}
 	}